Move to 2nm process node will have TSMC raking in the dough
World's top foundry gets ready for the next generation of chip production.

TSMC is expected to have 60,000 2nm wafers ready each month from four fabs. These facilities will be running at full capacity, and the price of these wafers is expected to rise 50% to $30,000 for each wafer from the $20,000 price TSMC charged for 3nm wafers. Reports indicate that TSMC is seeing strong demand for 2nm production from AI companies as tapeouts for the first two years of 2nm are higher than 3nm and 5nm during those process nodes' first two years.
A tapeout is when the chip designer (like Qualcomm, Apple, and Nvidia, for example) sends a file with the final chip design to the foundry. It marks the start of production of a particular chip. We've often pointed out how TSMC's client list contains the who's who of tech giants, including the three aforementioned names we mentioned at the start of this paragraph. Most of these companies are believed to be working with the foundry on 2nm chips.
Why is the process node used by a foundry so important? The key thing to remember is that as the process node numbers decline, the size of the transistors used in a chip gets smaller. As the size of transistors shrinks, the transistor count, the number of transistors inside the component, increases. Even more important, the transistor density increases. This metric measures how many millions of transistors are shoehorned into the chip per square millimeter (MTr/mm².
The Transistor density number is very important because the higher the figure is, the more powerful and energy efficient the chip is. Certain transistor density numbers also coincide with specific process nodes. Look at these figures:
- TSMC's 5nm: Approximately 130-170 MTr/mm²
- TSMC's 3nm: Approximately 190-220 MTr/mm²
What this is telling us is thanks to the use of smaller transistors with lower process nodes, 29% to 46% more transistors can be packed into a 3nm chip compared to a 5nm chip manufactured by TSMC. This indicates why a more advanced 3nm chip will typically outperform a 5nm chip while consuming less energy.
TSMC will also debut its Gate-All-Around (GAA) transistors with its 2nm process node. With GAA, the gate wraps completely around the channel, reducing current leakage and improving the drive current. Chips made using GAA transistors will show better performance and use less energy.
After 2nm, TSMC will start mass production of 1.4nm chips in 2028. However, TSMC's new naming scheme will replace nanometers with angstroms (Å), with 1 nanometer equaling 10 angstroms. The 1.4nm process will therefore be referred to as A14.
Things that are NOT allowed:
To help keep our community safe and free from spam, we apply temporary limits to newly created accounts: