Chinese newspaper accuses U.S. of stealing technology from "our Taiwan"

An editorial printed in the Chinese tabloid called Global Times (via South China Morning Post) has attacked TSMC's plans to build two fabs in the United States. The first factory will go online in 2024 producing chips made using TSMC's 4nm process node. The second factory, announced just this past week, will produce 3nm chips for Apple and other companies starting in 2026. It is great news for the U.S. as it tries to become self-sufficient when it comes to producing chips.

But the Global Times calls this a "dark turn" in the worldwide semiconductor industry and accuses the U.S. of tricking TSMC into building the new factories in Arizona. And using a chilling phrase, it accuses America of stealing the most important technology in the world from "our Taiwan." The U.S. has been concerned that China, seeking to be self-sufficient in chip production itself, might attack and go to war against Taiwan seeking control of the country which would include a battle for control of TSMC.

Taiwan Semiconductor Manufacturing Company Ltd. (TSMC) is the world's largest manufacturer of chips and Apple, at 25%, accounts for the largest percentage of company revenues. Earlier this year, U.S. President Joe Biden said that the U.S. would defend Taiwan in the event it was attacked by China.

TSMC has more than tripled the size of its investment in the U.S. from $12 million to $40 million and is expected to produce 600,000 wafers per year. That is a drop in the bucket when compared to the 12 million 12-inch wafers that TSMC churns out annually. TSMC continues to thrive despite some of the issues that other tech firms are experiencing. In November, company revenues soared 50.2% year-over-year to $7.27 billion.

The Global Times is related to the People's Daily which is the official newspaper of the Central Committee of the Chinese Communist Party (CCP). That means that its views are aligned with those of the CCP. The editorial reads, "We must ring the alarm bell louder...the U.S. may pressure chip makers in other countries as it did to TSMC."

By the time the second TSMC facility starts operations in 2026, the company could already be producing chips using a 2nm process node as it plans volume production at that node by 2025. The process node number itself doesn't really mean anything from a technological standpoint and simply is used to market the next generation of chip production. Each lower number typically means that the transistor size has been reduced allowing for a higher transistor count for each chip.

For example, the Apple A13 Bionic chipset, used in the iPhone 11 series back in 2019, was produced using the 7nm process node and featured 8.5 billion transistors. The A16 Bionic, used to power this year's iPhone 14 Pro series, is manufactured using the 4nm process (actually an enhanced 5nm process node) and carries nearly 16 billion transistors. The larger the number of transistors in a chip, the more powerful and energy-efficient it is.

TSMC, as we noted, expects to be pushing out 2nm chips in 2025 and has briefly discussed manufacturing 1nm chips in the future. Samsung Foundry, the second largest foundry after TSMC, also has plans to produce 2nm chips in 2025 and its roadmap includes the manufacturing of 1.4nm chips two years later. A wild card in this battle is U.S. chipmaker Intel. The company's CEO, Pat Gelsinger, said last year that his firm will regain process leadership from TSMC and Samsung by 2025.

Gelsinger is basing his optimism on Intel's use of RibbonFET transistor architecture, similar to Gate-All-Around (GAA) which Samsung is using on its 3nm components. TSMC will start using GAA for its 2nm chips. With GAA, nanosheets are stacked vertically allowing all sides of the channel to be covered by gates. This reduces leakages and can improve transistor density allowing more transistors to fit in a dense space.

Intel is also high on its PowerVia (or backside power delivery) technology. This allows transistors to draw electrical power from one side of a chip while the other side is used to connect to data communication links.