Intel CEO says company will regain process leadership from TSMC and Samsung by 2025

Moore's Law is an observation that was made by Fairchild Semiconductor and Intel co-founder Gordon Moore. The original version, published in 1965, said that the number of transistors inside an integrated circuit doubles every year. Ten years later, Moore changed the "Law" noting that the number of transistors inside integrated circuits doubles every other year.

The higher a component's transistor count, the more powerful and energy-efficient it is. But as the number of transistors inside chipsets reaches unbelievable numbers, many have questioned whether Moore's Law will no longer be possible. Consider the progression of the transistor count in Apple's A-series chipsets over the last few years.

2019's A13 Bionic used on the iPhone 11 series, carried 8.5 billion transistors while the A14 Bionic (used on the iPhone 12 series in 2020) had 11.8 billion transistors. This year's A15 Bionic SoC is equipped with 15 billion transistors. Based on the current architecture used to produce transistors, how much smaller can they be made? 

Both TSMC and Samsung, the world's top two independent foundries, have roadmaps that take their process nodes down to 2nm. However, both have suffered a slight detour in their journey and have delayed their shipments of 3nm chips. The foundries have blamed the increasing complexity of manufacturing integrated circuits using the 3nm process node.

As noted by CNET, Intel Chief Executive Pat Gelsinger said yesterday during an online conference, "Moore's law is alive and well. Today we are predicting that we will maintain or even go faster than Moore's law for the next decade. We as the stewards of Moore's Law will be relentless in our path to innovate." These bold statements were criticized by some since they came from the company that lost "process-leadership" to TSMC and Samsung over the last decade.

Using processors that contain multiple slices of silicon built inside a single package, Gelsinger makes it clear that Intel plans on recapturing process leadership. "We expect to even bend the curve faster than a doubling every two years," the CEO says. He also promised that this change will start to take place in 2024. Intel got caught up while trying to move from 14nm to 10nm while TSMC and Samsung continued moving forward.

Gelsinger points out two new developments that he says will give Intel its leadership back. One is called RibbonFET which is more commonly known as gate all-around (GAA). This design uses four gates to manipulate the current flow to transistors.

The other development is called PowerVia or backside power delivery. This allows transistors to draw electrical power from one side of a chip while using the other side to connect to data communication links. Today's chip designs have transistors trying to handle both functions from the same side which reduces the ability of designers to make the process less complicated and also limits the use of miniaturization.

The aforementioned developments, plus improvements in packaging are expected to give Intel the push it needs to regain its process leadership. Intel also says that it will be the first to use high numeric aperture Extreme Ultraviolet Lithography (EUV). As transistors get smaller, the process of transferring circuit designs to wafers becomes more complex. EUV already saved Moore's Law once before as these machines are capable of creating very thin circuity designs on the wafers that eventually get cut up into chips.

With all of these developments coming, Intel CEO Gelsinger firmly believes that Intel will draw even with TSMC and Samsung by 2024 and top them by 2025.