Samsung starts building 3nm smartphone chips in Korea

We’re slowly moving toward the size limitations of our Universe but before we reach that Planck volume, there’s still some wiggle room. This means smaller, faster, and more efficient chips in our smartphones of tomorrow.

Let’s leave quantum physics behind, and go straight to the news (feel free to discuss Planck constants in the comment section below). After TSMC published its roadmap, shedding light on when we can expect 3nm and 2nm chips, now Samsung has announced the production start of its 3nm semiconductor chips in Hwaseong factory in South Korea.

Samsung is moving to a new architecture, swapping FinFET (fin field-effect transistor) for GAA (Gate All Around). And if you’re worried that more physics is coming your way, just breathe. GAA offers several advantages over FinFET - the main one being higher power efficiency.

Another new technology involved in Samsung’s 3nm manufacturing node is the nanosheet transistor manufacturing. It replaces the nanowire technology, again boosting efficiency and also performance in this case. Using nanosheets gives the ability to very easily adjust this efficiency and performance parameters by simply altering the size of the nanosheet.

Samsung is quoting some impressive numbers, comparing the new 3nm node with the old 5nm manufacturing process. The new chips should come with 23% improved performance, a 45% reduction in power usage, and an area reduction of 16%, and this is just the first generation of 3nm silicon.