We've often discussed Moore's Law, discovered by Gordon Moore who was the former CEO of Intel. Moore's Law says that the number of transistors inside an integrated circuit doubles every other year. Current high-end chips like the Snapdragon 855 and Apple A12 Bionic are produced using the 7nm process, meaning that the size of the transistors inside the component is 7 billionths of a meter. That is smaller than the previous generation chips that used the 10nm process. To show you how far we've come, the Nexus 5 from 2013 was powered by the Snapdragon 800 SoC, which used the 28nm process.
according to CNET, Samsung announced today that it has been able to shrink the size of a transistor to 5nm. 2,000 of these transistors would fit across the width of a human hair! Chips using these smaller transistors will be able to boost performance by 10% or reduce energy consumption by 20%.Why is this important, you ask? Because as the size of transistors shrinks, more of them can fit into the dense space of an integrated circuit. More transistors employed on a chip give it more power and make the component more energy efficient. So that is why it is important that
Samsung will start mass production using the 5nm process during the second quarter of 2020. Right now, it is allowing its customers to build test chips at 5nm. Samsung will have competition from TSMC. The latter has started building prototype 5nm chips for customers and says that these are providing a 15% speed bump compared to the 10% that Sammy's chips are getting. While TSMC wouldn't give any detail about savings in energy consumption, the company says that the number of transistors that will fit in a particular surface area rises 80% with its technology compared to 25% for Samsung.
Both Samsung and TSMC are currently able to layout chip wafers more precisely by using extreme ultraviolet (EUV) technology. This technology uses short beams of UV light to etch patterns onto the wafers. Samsung and IBM are also working on a technology called nanosheets that was originally going to be used on 5nm chips. That is no longer the case, but when applied to the manufacture of chips, it is expected to raise performance by 50% or cut power consumption by 75%.